AI Hardware Deep Dive Update: How PCB, CPO, and MLCC Become the Three Physical Gates for Rubin Racks
目录
Too Long; Didn’t Read
1. Rack Systems Are Redistributing AI Hardware Spending
2. PCB Is the First Gate: Bandwidth and Packaging Land on the Board First
3. CPO Is the Second Gate: Optical Interconnect Enters the Architecture-Option Stage
4. MLCC Is the Third Gate: High Power Density Pushes Passive Components to the Foreground
5. The CPU Clue Belongs in the System BOM, Not as a Competing Main Line
6. Ranking the Three Chains: Different Certainty, Upside, and Falsification Speed
7. What to Track Next Is Not Slogans, but Seven Sets of Numbers
8. Conclusion: This Article Should Be Written as “The Three Physical Gates of AI Hardware,” Not Three Concept Lines
本内容基于公开资料和研报数据整理，不构成任何投资建议，不代表任何个人观点，仅供学习参考，请理性阅读
The AI hardware trade is shifting from individual GPUs to full-rack systems. Morgan Stanley has now placed VR200, Rubin, ABF, optical transceiver PCBs, and MLCCs on the same map. The real change is this: the bottleneck in compute delivery is moving to boards, optics, and power-density components, as well as to customer qualification and cash-flow realization.
Too Long; Didn’t Read
AI hardware is entering the rack-level accounting stage. A single VR200 NVL72 rack costs about US$7.8mn, ODM value per rack is expected to rise by roughly 38%, and memory’s share of Rubin BOM rises to above 25%. This means capital should not focus only on GPU prices, but also on which parts inside the full rack are beginning to capture incremental value.
PCB/ABF is the highest-certainty physical gate. Morgan Stanley expects ABF substrates to become tight from 2027, AI-related applications to account for more than 75% by 2030, and T-glass to remain tight through 2028. High-layer-count boards, M9 materials, optical transceiver PCBs, and substrates jointly determine whether AI racks can scale reliably.
CPO is the chain with the greatest upside but the hardest timing call. Morgan Stanley expects CPO switch shipments to grow at a 144% CAGR from 2024 to 2030, but pluggable optics, NPO, and CPO will coexist for a long time. The real beneficiaries are not a single optical-module segment, but silicon photonics, WDM, TGV glass, optical engines, testing, and switching systems.
MLCC is shifting from a cyclical component into a power-density component. Morgan Stanley estimates cloud and edge AI will add about US$1bn of TAM to the MLCC market by 2027, with AI servers seeing a significant increase in demand for high-capacitance MLCCs above 47uF. Unit share is not high, but value share and product mix will alter earnings leverage earlier.
CPUs should be treated as the background for rack platforms. CPU-related clues can be placed within Rubin, VR200, AI ASIC, and agentic inference frameworks, but the main lines remain the three physical bottlenecks of PCB, CPO, and MLCC. CPUs explain why the system BOM is being reshuffled; they do not displace the three core supply-chain themes.
Investment ranking should be layered by certainty and speed of falsification. For PCB/ABF, watch effective capacity, customer qualification, and cash flow. For CPO, watch architecture adoption and test yield. For MLCC, watch high-capacitance pricing, inventory, and product mix. If all three chains are strong, this is a second diffusion of AI hardware. If even one weakens, the rack-delivery slope must be reassessed.
1. Rack Systems Are Redistributing AI Hardware Spending
The easiest mistake in this AI hardware cycle is to reduce every question to GPU count. GPUs remain the largest value pool, of course. But after 2026, AI infrastructure increasingly looks like full-rack engineering: chips, memory, package substrates, high-speed PCBs, optical interconnects, power delivery, cooling, and system shipment together determine when compute actually comes online.
The value of Morgan Stanley’s Asia Summer School this time is that it did not discuss only one company or one component. Instead, it placed AI servers, VR200, Rubin, ABF, optical transceiver PCBs, and MLCCs inside one Greater China hardware framework. A few numbers are enough to make the point: a single VR200 NVL72 rack costs about US$7.8mn, ODM value per rack is expected to rise by roughly 38% on VR200, and memory’s BOM share in Rubin rises to above 25%.
There is a direct implication behind these numbers: the next stage of AI hardware is not only about “who gets GPU orders,” but also about “who prevents expensive GPUs from sitting idle.” The more expensive compute becomes, the more every part of the system that affects bandwidth, power delivery, packaging, signal integrity, and reliability shifts from a small component into a critical asset.
Rubin Rack Revaluation: GPU Share Falls to 51%, AI Hardware Value Is Moving Toward Memory, PCB, Power, and Liquid Cooling; Who Is Capturing the Incremental AI Hardware Value
We previously wrote about value migration in Rubin racks. This time, it is more useful to narrow the question to three physical gates: PCB/ABF carries bandwidth and packaging, CPO handles optoelectronic conversion across chips and switching systems, and MLCC provides stable power delivery under high power density. These are not three isolated tracks. They are three layers of constraint that take the same AI rack from “designable” to “mass-producible and deliverable.”
Under this framework, PCB should be placed first. PCB is not just a board-maker story. It connects GPU/ASIC platforms, optical modules, switches, ABF substrates, CCL materials, electronic glass fiber, HVLP copper foil, lamination and drilling, and customer qualification. Its certainty comes from orders and platform upgrades, and it can also be falsified the fastest: once high-end board pricing, lead times, yield, customer lock-in, and cash flow weaken at the same time, the market will immediately cut its weighting.
2. PCB Is the First Gate: Bandwidth and Packaging Land on the Board First
The PCB theme is most worth writing about because it is the first to translate “AI rack upgrades” into verifiable industrial questions. Rubin, GB300, VR200, AI ASICs, and 1.6T/3.2T optical interconnects do not automatically become orders. They must pass through material grade, layer count, line width and spacing, low loss, thermal stability, lamination yield, and customer qualification.
AI PCB and CCL Deep Dive: From GB300 to Rubin Ultra, Which Becomes Short First: High-Layer-Count Boards, M9 Materials, or Electronic Cloth
Morgan Stanley’s two judgments on ABF and optical transceiver PCBs make this line clearer. First, ABF substrates become tight from 2027, AI-related applications are expected to account for more than 75% by 2030, and T-glass remains supply-constrained through 2028. Second, optical transceiver growth will directly benefit PCBs, not only module makers and optical-chip vendors.
This means the upward move in PCB value does not come only from AI server motherboards. It also comes from three parallel clues.
The first is GPU/ASIC package substrates. AI chips are getting larger, HBM counts are rising, and package area, layer count, low warpage, thermal stability, and T-glass supply are all becoming hard constraints. ABF is not an accessory that simply “follows chip shipments.” It is the foundation that determines whether advanced-packaging capacity can be released. The supply-demand gap after 2027 is essentially AI ASICs, GPUs, CPUs, and high-speed packaging all competing for the same high-end materials and yields.
ABF and BT Substrate Price-Hike Revisions: From T-glass Constraints to BT Spillover, Why the AI Substrate Price-Hike Cycle Is Not Over
The second is high-speed server boards and switch boards. As AI clusters move from 800G to 1.6T and 3.2T, the loss budget for switch motherboards, line cards, backplanes, and high-speed connectivity links becomes increasingly tight. Material grades continue moving from M7/M8 to M9 and even lower-loss materials. Whether a board maker can reliably deliver high-layer-count, highly consistent, high-yield products matters more than nominal capacity expansion.
The third is optical transceiver PCBs. In the past, the market tended to view optical modules only as an issue for optical chips, DSPs, and module makers. But after 1.6T, board-level design, thermal management, signal integrity, package density, and customer qualification also determine whether a product can pass. Morgan Stanley’s decision to highlight “Optics Drives the Board” separately shows that optical-interconnect demand has already begun forcing upgrades in PCB materials and processes.
Here the A-share and Taiwan-listed company names should be made explicit. On the A-share side, use the official short names: Victory Giant Technology, WUS Printed Circuit, Shennan Circuits, Guanghe Technology, Shengyi Technology, DSBJ, and Avary Holding. On the Taiwan and overseas side, focus on the chain positions of Nan Ya PCB, Unimicron, Kinsus, Ibiden, Zhen Ding, Gold Circuit Electronics, and Taiwan Union Technology. The article should not directly import English aliases from foreign-broker reports into the body text, and Guanghe Technology must not be rendered as a phonetic transliteration.
Victory Giant Technology Deep Dive Update: How Rubin High-Layer-Count Board Delays, New TPU Orders, and RMB20bn CapEx Validate Effective AI PCB Capacity
The conclusion on PCB can be more direct: its upside may not be the largest at every stage, but its certainty is the strongest. The more complex AI racks become, the more they need board makers that can pass customer qualification, mass-produce reliably, and get through material bottlenecks. Capacity announcements do not directly become supply, and customer lock-in does not directly become profit. Ultimately, the four numbers to watch are price, yield, lead time, and cash flow.
3. CPO Is the Second Gate: Optical Interconnect Enters the Architecture-Option Stage
The value of the CPO theme is that it explains why AI clusters cannot rely forever on traditional pluggable modules to stack bandwidth. The larger training and inference clusters become, the more important switching-system power consumption, latency, maintainability, link density, and reliability become. Pluggable optical modules will continue to exist for a long time, but NPO and CPO will shift some value away from standalone modules and toward optoelectronic co-design near the switch chip.
Morgan Stanley’s number is steep: CPO switch shipments are expected to grow at a 144% CAGR from 2024 to 2030. This figure should not be read mechanically as CPO immediately replacing pluggables across the board. It is more like a pricing signal for an architectural option. As long as switch power consumption and link density keep rising, customers must keep evaluating solutions that move optical capability closer to the switch chip.
AI Network Interconnect Hardware, Part One: Value Migration Behind 1.6T/3.2T; Who Benefits Most Across Switching, Copper Interconnect, Optical Interconnect, and the Physical Layer
The CPO supply chain should not be written only as optical-module makers. It includes at least six asset categories: switch ASICs, silicon photonics/PIC, external light sources and optical engines, WDM filters, TGV glass and precision optical components, and system-level test and yield equipment. Morgan Stanley this time mentioned silicon lenses, TGV glass substrates, and WDM filter projects related to WLCSP, as well as Chroma ATE’s opportunities in silicon photonics, CPO testing, and system-level testing. This direction is more worth tracking than “who has made a CPO concept product.”
The risks in CPO must also be acknowledged. CPO has the greatest upside, but the most uncertain timing. If customers believe pluggables and NPO can still meet cost, maintenance, and supply requirements, CPO mass production will be delayed. SemiAnalysis has previously written about 800VDC and CPO delays, and market expectations for CPO have also moved from “immediate replacement” back to “multiple routes coexisting.” This correction is healthy because it brings CPO back from concept trading to engineering validation.
CPO Bull-Market Expectations Cool: Architecture Debate Cannot Stop Optical Growth; AI Clusters Enter the Optical-Interconnect Era
What is most worth writing about in CPO is not the replacement curve, but how value is redistributed. In the pluggable era, investors were most familiar with optical modules, DSPs, optical chips, and connectors. In the NPO/CPO era, the new questions become: who defines the system, the optical engine or the switch ASIC; who controls yield through test equipment; can TGV glass and WDM filters become new bottlenecks; and can system vendors take on more complex delivery responsibility?
The final judgment on this line is: CPO is not the highest-certainty main theme, but it is the highest-slope option. As long as AI cluster scale continues to expand, total demand for optical interconnects will keep growing. As long as power consumption and link density continue to tighten, the engineering value of NPO/CPO will be reassessed. What must be avoided is presenting CPO as a bet on a single company, a single route, or a single year.
4. MLCC Is the Third Gate: High Power Density Pushes Passive Components to the Foreground
MLCCs are the easiest to underestimate because they look small, fragmented, and highly cyclical. What AI servers are really changing is not simply that “each machine uses more small capacitors,” but that in high-power, high-current, high-noise, high-density environments, demand is clearly rising for high-capacitance, high-reliability, and highly consistent MLCCs.
Morgan Stanley provides a set of numbers that fit well in the main text: cloud and edge AI could add roughly US$1 billion of TAM to the overall MLCC market by 2027; cloud AI alone could contribute roughly US$1 billion of TAM by 2026; AI servers will significantly increase usage of high-capacitance MLCCs above 47uF; AI server MLCCs account for only about 3% of global unit volume, but roughly 5% of value.
This gap matters. It shows that AI servers are not creating a volume shock for MLCCs, but a product-mix shock. The traditional consumer electronics cycle focuses on inventory and smartphone shipments. AI servers focus on high-capacitance products, automotive/industrial-grade reliability, power density, server customer qualification, and utilization at high-end production lines. Low unit share but high value share is exactly where passive components begin to move from cyclical products toward compute infrastructure.
MLCC deep dive: JPMorgan sharply raises its view, from cyclical recovery to structural re-rating as AI servers rewrite the supply-demand gap
The MLCC chain should be viewed in three layers. The first layer is the Japanese and Taiwanese leaders, including Murata, Yageo, Taiyo Yuden, and TDK. They benefit more directly from high-capacitance, high-reliability, and server product-mix upgrades. The second layer is Korean and other global suppliers, including Samsung Electro-Mechanics, where the focus is high-end inventory, pricing, and server customer adoption. The third layer is the domestic China mapping, including Three-Circle Group, Fenghua Advanced Technology, and Sinocera, where the key issue is not simple substitution, but whether they can enter high-reliability ceramic powders, high-end MLCCs, and server qualification.
Yageo deep-dive update: AI demand starts to tighten MLCC supply, and how price hikes in mid- and low-capacitance products may rewrite the 2027-2028 income statement
The MLCC thesis can also be falsified faster than CPO. If inventory does not keep declining, high-capacitance MLCCs above 47uF show no price elasticity, price hikes in ordinary mid- and low-capacitance products fail to flow through to gross margin, and AI server orders do not clearly improve the product mix, the market will place MLCCs back into the ordinary passive-component cycle.
MLCC belongs as the third main line because it is not the most visible, but it can verify whether AI hardware has entered the “power-density era.” If AI server demand is merely short-term pull-in, its impact will be absorbed by the inventory cycle. If Rubin, VR200, and subsequent AI ASICs continue to raise power density, high-capacitance MLCCs will become one of the earliest components in the power system to reflect pricing and structural change.
5. The CPU Clue Belongs in the System BOM, Not as a Competing Main Line
The CPU clue can remain, but it should not sit directly alongside PCB, CPO, and MLCC as one of the three major physical gates. CPU is more of an explanatory thread: why AI servers are shifting from GPU servers into systems whose pricing is jointly determined by GPUs, CPUs, memory, networking, packaging, power delivery, and board-level interconnects.
The changes in Rubin and VR200 show that AI racks are not simply a linear scaling of single-card performance. Memory BOM rising above 25%, ODM value per rack increasing by roughly 38%, and rack cost reaching about US$7.8 million all show that non-GPU value inside the system is rising. CPUs, AI ASICs, switch chips, DPUs, and host processors will affect platform design, and will also influence PCB layer count, ABF demand, MLCC usage, and optical interconnect configuration.
But in writing, avoid turning CPU into a separate, scattered narrative of “CPU is also important.” A better treatment is to place CPU within “system architecture change”: as inference and agent workloads increase, host-side control, memory bandwidth, network scheduling, and data movement all become more important. These changes will continue to lift the value of PCB, ABF, CPO, and MLCC.
The more suitable structure is: write PCB, CPO, and MLCC as the main lines, and weave CPU in as a background variable. This preserves CPU’s explanatory value for the platform BOM without fragmenting the article.
6. Ranking the Three Chains: Different Certainty, Upside, and Falsification Speed
The investment conclusion of this report cannot simply be “all benefit.” The three chains have completely different rhythms, payoff profiles, and risks.
PCB/ABF has the highest certainty. The reason is that orders, materials, customer qualification, and supply constraints can already be seen in the supply chain. As long as Rubin, GB300, AI ASICs, and 1.6T continue to advance, high-layer-count boards, ABF, M9 materials, and PCB for optical transceivers will continue to gain value. Its risk is also clear: if nominal capacity expansion becomes effective capacity, or if customer qualification loosens, pricing and lead times will reflect it first.
CPO has the greatest upside. It does not correspond to selling a few more modules this year, but to a potential change in switch system architecture. If CPO adoption proceeds smoothly, silicon photonics, WDM, TGV glass, optical engines, testing, and switch systems will be re-rated together. But CPO’s biggest risk is timing. Mass-production pace, maintenance cost, yield, and customer roadmaps will all affect realization.
MLCC’s durability is the most worth tracking. It is not as easy to explain as PCB, and not as attractive as CPO, but it can show whether AI servers are truly forcing high power density into the passive-component supply chain. If price increases in high-capacitance MLCCs, inventory declines, and product-mix improvement appear simultaneously, MLCC is no longer just a cyclical recovery in passive components, but a structural re-rating of AI power density.
The ideal combination is: PCB provides certainty, CPO provides long-term upside, and MLCC provides structural durability. If all three chains are strong, it means AI hardware demand is spreading from GPUs into the system foundation. If only one chain is strong, the article should be written as single-line tracking. Only when all three weaken at the same time does it indicate that the AI rack delivery chain is beginning to cool.
7. What to Track Next Is Not Slogans, but Seven Sets of Numbers
This main line does not need more claims that “AI hardware demand is strong.” What really needs tracking is seven sets of verifiable numbers.
First, GB200/GB300 and VR200/Rubin rack shipments. Morgan Stanley’s forecast for 2026 GB200/300 rack shipments is 70-80K. If this number is revised down, it will directly affect the order slope for high-end PCB, MLCC, ODM, and optical interconnects.
Second, ABF and T-glass lead times. ABF shortages from 2027 and tight T-glass supply through 2028 are the hardest assumptions for the PCB/substrate line. As soon as lead times shorten ahead of schedule or new capacity is released quickly, valuations need to step down.
Third, high-layer-count board and M9 material prices. The core of PCB is not that layer counts keep rising, but whether high-end materials and yield can preserve ASP. Weaker prices, shorter lead times, and major yield improvement would all reduce board makers’ profit elasticity.
Fourth, CPO/NPO customer roadmaps. CPO switch shipment forecasts are steep, but customers may first use pluggables and NPO as a transition. The focus should be the real roadmaps of leading cloud vendors, switch ASIC companies, and system vendors, not just concept launches.
Fifth, silicon photonics and CPO testing orders. Whether CPO can scale ultimately depends on whether testing equipment, optical engines, TGV glass, and the WDM chain can keep up. Testing orders and yield are more important than slogans.
Sixth, prices and lead times for high-capacitance MLCCs above 47uF. Price hikes in ordinary MLCCs only prove cyclical recovery. Price hikes in high-capacitance server-grade products prove that AI demand is changing the structure.
Seventh, cash flow and inventory. For PCB, watch operating cash flow and accounts receivable/inventory. For MLCC, watch channel inventory and utilization. For CPO, watch system-level delivery and testing yield. As long as order growth does not turn into cash flow, the trade can easily fall back into a thematic trade.
8. Conclusion: This Article Should Be Written as “The Three Physical Gates of AI Hardware,” Not Three Concept Lines
The best landing point for this deep-dive report is to frame PCB, CPO, and MLCC as three physical gates within the same AI rack. PCB solves bandwidth and packaging support; CPO solves optical interconnect architecture for larger clusters; MLCC solves power stability under high power density. CPU can serve as a background variable for changes in Rubin and agent inference platforms, but it should not take over the main line.
If the article only writes three industry lines, it becomes a materials platter. If it starts from VR200 and Rubin racks, the three chains connect naturally. AI hardware is not only short of GPUs. The real question is how expensive GPUs can be powered stably, connected reliably, transmitted at high speed, and delivered on time. Whoever solves that problem can capture harder profits from the next phase of AI CapEx.
The follow-up ranking can remain simple: look first to PCB/ABF for certainty, to CPO for the long-term slope, and to MLCC for structural durability. The market will be willing to assign higher valuations not to the hottest-named segment, but to the companies that can translate AI rack upgrades into orders, prices, yields, customer qualification, and cash flow.AI Hardware Deep Dive Update: How PCB, CPO, and MLCC Become the Three Physical Gates for Rubin Racks
目录
Too Long; Didn’t Read
1. Rack Systems Are Redistributing AI Hardware Spending
2. PCB Is the First Gate: Bandwidth and Packaging Land on the Board First
3. CPO Is the Second Gate: Optical Interconnect Enters the Architecture-Option Stage
4. MLCC Is the Third Gate: High Power Density Pushes Passive Components to the Foreground
5. The CPU Clue Belongs in the System BOM, Not as a Competing Main Line
6. Ranking the Three Chains: Different Certainty, Upside, and Falsification Speed
7. What to Track Next Is Not Slogans, but Seven Sets of Numbers
8. Conclusion: This Article Should Be Written as “The Three Physical Gates of AI Hardware,” Not Three Concept Lines
本内容基于公开资料和研报数据整理，不构成任何投资建议，不代表任何个人观点，仅供学习参考，请理性阅读
The AI hardware trade is shifting from individual GPUs to full-rack systems. Morgan Stanley has now placed VR200, Rubin, ABF, optical transceiver PCBs, and MLCCs on the same map. The real change is this: the bottleneck in compute delivery is moving to boards, optics, and power-density components, as well as to customer qualification and cash-flow realization.
Too Long; Didn’t Read
AI hardware is entering the rack-level accounting stage. A single VR200 NVL72 rack costs about US$7.8mn, ODM value per rack is expected to rise by roughly 38%, and memory’s share of Rubin BOM rises to above 25%. This means capital should not focus only on GPU prices, but also on which parts inside the full rack are beginning to capture incremental value.
PCB/ABF is the highest-certainty physical gate. Morgan Stanley expects ABF substrates to become tight from 2027, AI-related applications to account for more than 75% by 2030, and T-glass to remain tight through 2028. High-layer-count boards, M9 materials, optical transceiver PCBs, and substrates jointly determine whether AI racks can scale reliably.
CPO is the chain with the greatest upside but the hardest timing call. Morgan Stanley expects CPO switch shipments to grow at a 144% CAGR from 2024 to 2030, but pluggable optics, NPO, and CPO will coexist for a long time. The real beneficiaries are not a single optical-module segment, but silicon photonics, WDM, TGV glass, optical engines, testing, and switching systems.
MLCC is shifting from a cyclical component into a power-density component. Morgan Stanley estimates cloud and edge AI will add about US$1bn of TAM to the MLCC market by 2027, with AI servers seeing a significant increase in demand for high-capacitance MLCCs above 47uF. Unit share is not high, but value share and product mix will alter earnings leverage earlier.
CPUs should be treated as the background for rack platforms. CPU-related clues can be placed within Rubin, VR200, AI ASIC, and agentic inference frameworks, but the main lines remain the three physical bottlenecks of PCB, CPO, and MLCC. CPUs explain why the system BOM is being reshuffled; they do not displace the three core supply-chain themes.
Investment ranking should be layered by certainty and speed of falsification. For PCB/ABF, watch effective capacity, customer qualification, and cash flow. For CPO, watch architecture adoption and test yield. For MLCC, watch high-capacitance pricing, inventory, and product mix. If all three chains are strong, this is a second diffusion of AI hardware. If even one weakens, the rack-delivery slope must be reassessed.
1. Rack Systems Are Redistributing AI Hardware Spending
The easiest mistake in this AI hardware cycle is to reduce every question to GPU count. GPUs remain the largest value pool, of course. But after 2026, AI infrastructure increasingly looks like full-rack engineering: chips, memory, package substrates, high-speed PCBs, optical interconnects, power delivery, cooling, and system shipment together determine when compute actually comes online.
The value of Morgan Stanley’s Asia Summer School this time is that it did not discuss only one company or one component. Instead, it placed AI servers, VR200, Rubin, ABF, optical transceiver PCBs, and MLCCs inside one Greater China hardware framework. A few numbers are enough to make the point: a single VR200 NVL72 rack costs about US$7.8mn, ODM value per rack is expected to rise by roughly 38% on VR200, and memory’s BOM share in Rubin rises to above 25%.
There is a direct implication behind these numbers: the next stage of AI hardware is not only about “who gets GPU orders,” but also about “who prevents expensive GPUs from sitting idle.” The more expensive compute becomes, the more every part of the system that affects bandwidth, power delivery, packaging, signal integrity, and reliability shifts from a small component into a critical asset.
Rubin Rack Revaluation: GPU Share Falls to 51%, AI Hardware Value Is Moving Toward Memory, PCB, Power, and Liquid Cooling; Who Is Capturing the Incremental AI Hardware Value
We previously wrote about value migration in Rubin racks. This time, it is more useful to narrow the question to three physical gates: PCB/ABF carries bandwidth and packaging, CPO handles optoelectronic conversion across chips and switching systems, and MLCC provides stable power delivery under high power density. These are not three isolated tracks. They are three layers of constraint that take the same AI rack from “designable” to “mass-producible and deliverable.”
Under this framework, PCB should be placed first. PCB is not just a board-maker story. It connects GPU/ASIC platforms, optical modules, switches, ABF substrates, CCL materials, electronic glass fiber, HVLP copper foil, lamination and drilling, and customer qualification. Its certainty comes from orders and platform upgrades, and it can also be falsified the fastest: once high-end board pricing, lead times, yield, customer lock-in, and cash flow weaken at the same time, the market will immediately cut its weighting.
2. PCB Is the First Gate: Bandwidth and Packaging Land on the Board First
The PCB theme is most worth writing about because it is the first to translate “AI rack upgrades” into verifiable industrial questions. Rubin, GB300, VR200, AI ASICs, and 1.6T/3.2T optical interconnects do not automatically become orders. They must pass through material grade, layer count, line width and spacing, low loss, thermal stability, lamination yield, and customer qualification.
AI PCB and CCL Deep Dive: From GB300 to Rubin Ultra, Which Becomes Short First: High-Layer-Count Boards, M9 Materials, or Electronic Cloth
Morgan Stanley’s two judgments on ABF and optical transceiver PCBs make this line clearer. First, ABF substrates become tight from 2027, AI-related applications are expected to account for more than 75% by 2030, and T-glass remains supply-constrained through 2028. Second, optical transceiver growth will directly benefit PCBs, not only module makers and optical-chip vendors.
This means the upward move in PCB value does not come only from AI server motherboards. It also comes from three parallel clues.
The first is GPU/ASIC package substrates. AI chips are getting larger, HBM counts are rising, and package area, layer count, low warpage, thermal stability, and T-glass supply are all becoming hard constraints. ABF is not an accessory that simply “follows chip shipments.” It is the foundation that determines whether advanced-packaging capacity can be released. The supply-demand gap after 2027 is essentially AI ASICs, GPUs, CPUs, and high-speed packaging all competing for the same high-end materials and yields.
ABF and BT Substrate Price-Hike Revisions: From T-glass Constraints to BT Spillover, Why the AI Substrate Price-Hike Cycle Is Not Over
The second is high-speed server boards and switch boards. As AI clusters move from 800G to 1.6T and 3.2T, the loss budget for switch motherboards, line cards, backplanes, and high-speed connectivity links becomes increasingly tight. Material grades continue moving from M7/M8 to M9 and even lower-loss materials. Whether a board maker can reliably deliver high-layer-count, highly consistent, high-yield products matters more than nominal capacity expansion.
The third is optical transceiver PCBs. In the past, the market tended to view optical modules only as an issue for optical chips, DSPs, and module makers. But after 1.6T, board-level design, thermal management, signal integrity, package density, and customer qualification also determine whether a product can pass. Morgan Stanley’s decision to highlight “Optics Drives the Board” separately shows that optical-interconnect demand has already begun forcing upgrades in PCB materials and processes.
Here the A-share and Taiwan-listed company names should be made explicit. On the A-share side, use the official short names: Victory Giant Technology, WUS Printed Circuit, Shennan Circuits, Guanghe Technology, Shengyi Technology, DSBJ, and Avary Holding. On the Taiwan and overseas side, focus on the chain positions of Nan Ya PCB, Unimicron, Kinsus, Ibiden, Zhen Ding, Gold Circuit Electronics, and Taiwan Union Technology. The article should not directly import English aliases from foreign-broker reports into the body text, and Guanghe Technology must not be rendered as a phonetic transliteration.
Victory Giant Technology Deep Dive Update: How Rubin High-Layer-Count Board Delays, New TPU Orders, and RMB20bn CapEx Validate Effective AI PCB Capacity
The conclusion on PCB can be more direct: its upside may not be the largest at every stage, but its certainty is the strongest. The more complex AI racks become, the more they need board makers that can pass customer qualification, mass-produce reliably, and get through material bottlenecks. Capacity announcements do not directly become supply, and customer lock-in does not directly become profit. Ultimately, the four numbers to watch are price, yield, lead time, and cash flow.
3. CPO Is the Second Gate: Optical Interconnect Enters the Architecture-Option Stage
The value of the CPO theme is that it explains why AI clusters cannot rely forever on traditional pluggable modules to stack bandwidth. The larger training and inference clusters become, the more important switching-system power consumption, latency, maintainability, link density, and reliability become. Pluggable optical modules will continue to exist for a long time, but NPO and CPO will shift some value away from standalone modules and toward optoelectronic co-design near the switch chip.
Morgan Stanley’s number is steep: CPO switch shipments are expected to grow at a 144% CAGR from 2024 to 2030. This figure should not be read mechanically as CPO immediately replacing pluggables across the board. It is more like a pricing signal for an architectural option. As long as switch power consumption and link density keep rising, customers must keep evaluating solutions that move optical capability closer to the switch chip.
AI Network Interconnect Hardware, Part One: Value Migration Behind 1.6T/3.2T; Who Benefits Most Across Switching, Copper Interconnect, Optical Interconnect, and the Physical Layer
The CPO supply chain should not be written only as optical-module makers. It includes at least six asset categories: switch ASICs, silicon photonics/PIC, external light sources and optical engines, WDM filters, TGV glass and precision optical components, and system-level test and yield equipment. Morgan Stanley this time mentioned silicon lenses, TGV glass substrates, and WDM filter projects related to WLCSP, as well as Chroma ATE’s opportunities in silicon photonics, CPO testing, and system-level testing. This direction is more worth tracking than “who has made a CPO concept product.”
The risks in CPO must also be acknowledged. CPO has the greatest upside, but the most uncertain timing. If customers believe pluggables and NPO can still meet cost, maintenance, and supply requirements, CPO mass production will be delayed. SemiAnalysis has previously written about 800VDC and CPO delays, and market expectations for CPO have also moved from “immediate replacement” back to “multiple routes coexisting.” This correction is healthy because it brings CPO back from concept trading to engineering validation.
CPO Bull-Market Expectations Cool: Architecture Debate Cannot Stop Optical Growth; AI Clusters Enter the Optical-Interconnect Era
What is most worth writing about in CPO is not the replacement curve, but how value is redistributed. In the pluggable era, investors were most familiar with optical modules, DSPs, optical chips, and connectors. In the NPO/CPO era, the new questions become: who defines the system, the optical engine or the switch ASIC; who controls yield through test equipment; can TGV glass and WDM filters become new bottlenecks; and can system vendors take on more complex delivery responsibility?
The final judgment on this line is: CPO is not the highest-certainty main theme, but it is the highest-slope option. As long as AI cluster scale continues to expand, total demand for optical interconnects will keep growing. As long as power consumption and link density continue to tighten, the engineering value of NPO/CPO will be reassessed. What must be avoided is presenting CPO as a bet on a single company, a single route, or a single year.
4. MLCC Is the Third Gate: High Power Density Pushes Passive Components to the Foreground
MLCCs are the easiest to underestimate because they look small, fragmented, and highly cyclical. What AI servers are really changing is not simply that “each machine uses more small capacitors,” but that in high-power, high-current, high-noise, high-density environments, demand is clearly rising for high-capacitance, high-reliability, and highly consistent MLCCs.
Morgan Stanley provides a set of numbers that fit well in the main text: cloud and edge AI could add roughly US$1 billion of TAM to the overall MLCC market by 2027; cloud AI alone could contribute roughly US$1 billion of TAM by 2026; AI servers will significantly increase usage of high-capacitance MLCCs above 47uF; AI server MLCCs account for only about 3% of global unit volume, but roughly 5% of value.
This gap matters. It shows that AI servers are not creating a volume shock for MLCCs, but a product-mix shock. The traditional consumer electronics cycle focuses on inventory and smartphone shipments. AI servers focus on high-capacitance products, automotive/industrial-grade reliability, power density, server customer qualification, and utilization at high-end production lines. Low unit share but high value share is exactly where passive components begin to move from cyclical products toward compute infrastructure.
MLCC deep dive: JPMorgan sharply raises its view, from cyclical recovery to structural re-rating as AI servers rewrite the supply-demand gap
The MLCC chain should be viewed in three layers. The first layer is the Japanese and Taiwanese leaders, including Murata, Yageo, Taiyo Yuden, and TDK. They benefit more directly from high-capacitance, high-reliability, and server product-mix upgrades. The second layer is Korean and other global suppliers, including Samsung Electro-Mechanics, where the focus is high-end inventory, pricing, and server customer adoption. The third layer is the domestic China mapping, including Three-Circle Group, Fenghua Advanced Technology, and Sinocera, where the key issue is not simple substitution, but whether they can enter high-reliability ceramic powders, high-end MLCCs, and server qualification.
Yageo deep-dive update: AI demand starts to tighten MLCC supply, and how price hikes in mid- and low-capacitance products may rewrite the 2027-2028 income statement
The MLCC thesis can also be falsified faster than CPO. If inventory does not keep declining, high-capacitance MLCCs above 47uF show no price elasticity, price hikes in ordinary mid- and low-capacitance products fail to flow through to gross margin, and AI server orders do not clearly improve the product mix, the market will place MLCCs back into the ordinary passive-component cycle.
MLCC belongs as the third main line because it is not the most visible, but it can verify whether AI hardware has entered the “power-density era.” If AI server demand is merely short-term pull-in, its impact will be absorbed by the inventory cycle. If Rubin, VR200, and subsequent AI ASICs continue to raise power density, high-capacitance MLCCs will become one of the earliest components in the power system to reflect pricing and structural change.
5. The CPU Clue Belongs in the System BOM, Not as a Competing Main Line
The CPU clue can remain, but it should not sit directly alongside PCB, CPO, and MLCC as one of the three major physical gates. CPU is more of an explanatory thread: why AI servers are shifting from GPU servers into systems whose pricing is jointly determined by GPUs, CPUs, memory, networking, packaging, power delivery, and board-level interconnects.
The changes in Rubin and VR200 show that AI racks are not simply a linear scaling of single-card performance. Memory BOM rising above 25%, ODM value per rack increasing by roughly 38%, and rack cost reaching about US$7.8 million all show that non-GPU value inside the system is rising. CPUs, AI ASICs, switch chips, DPUs, and host processors will affect platform design, and will also influence PCB layer count, ABF demand, MLCC usage, and optical interconnect configuration.
But in writing, avoid turning CPU into a separate, scattered narrative of “CPU is also important.” A better treatment is to place CPU within “system architecture change”: as inference and agent workloads increase, host-side control, memory bandwidth, network scheduling, and data movement all become more important. These changes will continue to lift the value of PCB, ABF, CPO, and MLCC.
The more suitable structure is: write PCB, CPO, and MLCC as the main lines, and weave CPU in as a background variable. This preserves CPU’s explanatory value for the platform BOM without fragmenting the article.
6. Ranking the Three Chains: Different Certainty, Upside, and Falsification Speed
The investment conclusion of this report cannot simply be “all benefit.” The three chains have completely different rhythms, payoff profiles, and risks.
PCB/ABF has the highest certainty. The reason is that orders, materials, customer qualification, and supply constraints can already be seen in the supply chain. As long as Rubin, GB300, AI ASICs, and 1.6T continue to advance, high-layer-count boards, ABF, M9 materials, and PCB for optical transceivers will continue to gain value. Its risk is also clear: if nominal capacity expansion becomes effective capacity, or if customer qualification loosens, pricing and lead times will reflect it first.
CPO has the greatest upside. It does not correspond to selling a few more modules this year, but to a potential change in switch system architecture. If CPO adoption proceeds smoothly, silicon photonics, WDM, TGV glass, optical engines, testing, and switch systems will be re-rated together. But CPO’s biggest risk is timing. Mass-production pace, maintenance cost, yield, and customer roadmaps will all affect realization.
MLCC’s durability is the most worth tracking. It is not as easy to explain as PCB, and not as attractive as CPO, but it can show whether AI servers are truly forcing high power density into the passive-component supply chain. If price increases in high-capacitance MLCCs, inventory declines, and product-mix improvement appear simultaneously, MLCC is no longer just a cyclical recovery in passive components, but a structural re-rating of AI power density.
The ideal combination is: PCB provides certainty, CPO provides long-term upside, and MLCC provides structural durability. If all three chains are strong, it means AI hardware demand is spreading from GPUs into the system foundation. If only one chain is strong, the article should be written as single-line tracking. Only when all three weaken at the same time does it indicate that the AI rack delivery chain is beginning to cool.
7. What to Track Next Is Not Slogans, but Seven Sets of Numbers
This main line does not need more claims that “AI hardware demand is strong.” What really needs tracking is seven sets of verifiable numbers.
First, GB200/GB300 and VR200/Rubin rack shipments. Morgan Stanley’s forecast for 2026 GB200/300 rack shipments is 70-80K. If this number is revised down, it will directly affect the order slope for high-end PCB, MLCC, ODM, and optical interconnects.
Second, ABF and T-glass lead times. ABF shortages from 2027 and tight T-glass supply through 2028 are the hardest assumptions for the PCB/substrate line. As soon as lead times shorten ahead of schedule or new capacity is released quickly, valuations need to step down.
Third, high-layer-count board and M9 material prices. The core of PCB is not that layer counts keep rising, but whether high-end materials and yield can preserve ASP. Weaker prices, shorter lead times, and major yield improvement would all reduce board makers’ profit elasticity.
Fourth, CPO/NPO customer roadmaps. CPO switch shipment forecasts are steep, but customers may first use pluggables and NPO as a transition. The focus should be the real roadmaps of leading cloud vendors, switch ASIC companies, and system vendors, not just concept launches.
Fifth, silicon photonics and CPO testing orders. Whether CPO can scale ultimately depends on whether testing equipment, optical engines, TGV glass, and the WDM chain can keep up. Testing orders and yield are more important than slogans.
Sixth, prices and lead times for high-capacitance MLCCs above 47uF. Price hikes in ordinary MLCCs only prove cyclical recovery. Price hikes in high-capacitance server-grade products prove that AI demand is changing the structure.
Seventh, cash flow and inventory. For PCB, watch operating cash flow and accounts receivable/inventory. For MLCC, watch channel inventory and utilization. For CPO, watch system-level delivery and testing yield. As long as order growth does not turn into cash flow, the trade can easily fall back into a thematic trade.
8. Conclusion: This Article Should Be Written as “The Three Physical Gates of AI Hardware,” Not Three Concept Lines
The best landing point for this deep-dive report is to frame PCB, CPO, and MLCC as three physical gates within the same AI rack. PCB solves bandwidth and packaging support; CPO solves optical interconnect architecture for larger clusters; MLCC solves power stability under high power density. CPU can serve as a background variable for changes in Rubin and agent inference platforms, but it should not take over the main line.
If the article only writes three industry lines, it becomes a materials platter. If it starts from VR200 and Rubin racks, the three chains connect naturally. AI hardware is not only short of GPUs. The real question is how expensive GPUs can be powered stably, connected reliably, transmitted at high speed, and delivered on time. Whoever solves that problem can capture harder profits from the next phase of AI CapEx.
The follow-up ranking can remain simple: look first to PCB/ABF for certainty, to CPO for the long-term slope, and to MLCC for structural durability. The market will be willing to assign higher valuations not to the hottest-named segment, but to the companies that can translate AI rack upgrades into orders, prices, yields, customer qualification, and cash flow.